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Octal bus transceiver Integrated Circuit Chip 3-state 74HC245PW,118

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Octal bus transceiver Integrated Circuit Chip 3-state 74HC245PW,118

Model Number : 74HC245PW

Certification : new & original

Place of Origin : original factory

MOQ : 20pcs

Price : negotiation

Payment Terms : T/T, Western Union,PayPal

Supply Ability : 20000pcs

Delivery Time : 1 day

Packaging Details : please contact me for details

Description : Transceiver, Non-Inverting 1 Element 8 Bit per Element 3-State Output 20-TSSOP

feature 1 : Octal bidirectional bus interface

feature 2 : Non-inverting 3-state outputs

feature 3 : Multiple package options

feature 4 : Complies with JEDEC standard no. 7A

ESD protection 1 : HBM EIA/JESD22-A114-B exceeds 2000 V

ESD protection 2 : MM EIA/JESD22-A115-A exceeds 200 V

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1. General description

The 74HC245; 74HCT245 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL).

The 74HC245; 74HCT245 is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74HC245; 74HCT245 features an output enable input (OE) for easy cascading and a send/receive input (DIR) for direction control. OE controls the outputs so that the buses are effectively isolated.

The 74HC245; 74HCT245 is similar to the 74HC640; 74HCT640 but has true (non-inverting) outputs.

2. Features

■ Octal bidirectional bus interface

■ Non-inverting 3-state outputs

■ Multiple package options

■ Complies with JEDEC standard no. 7A

■ ESD protection:

◆ HBM EIA/JESD22-A114-B exceeds 2000 V

◆ MM EIA/JESD22-A115-A exceeds 200 V

■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C

3. Quick reference data

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

Symbol Parameter Conditions Min Typ Max Unit
Type 74HC245
tPHL, tPLH

propagation delay

An to Bn or Bn to An

CL = 15 pF;

VCC =5V

- 7 - ns
CI input capacitance - 3.5 - pF
CI/O input/output capacitance - 10 - pF
CPD

power dissipation capacitance per

transceiver

VI = GND to VCC [1] - 30 - pF
Type 74HC245
tPHL, tPLH

propagation delay

An to Bn or Bn to An

CL = 15 pF;

VCC =5V

- 10 - ns
CI input capacitance - 3.5 - pF
CI/O input/output capacitance - 10 - pF
CPD

power dissipation capacitance per

transceiver

VI = GND to

VCC − 1.5 V

[1] - 30 - pF

[1] CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

∑ (CL × VCC2 × fo) = sum of outputs.

4. Functional diagram


Product Tags:

integrated circuit ic

      

integrated circuit components

      
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